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Full-Gate Verification of Superconducting Integrated Circuit Layouts With InductEx
Fourie, Coenrad J.Volume:
25
Language:
english
Journal:
IEEE Transactions on Applied Superconductivity
DOI:
10.1109/tasc.2014.2360870
Date:
February, 2015
File:
PDF, 1.02 MB
english, 2015