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[IEEE 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2008.04.23-2008.04.25)] 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - An 8.69 Mvertices/s 278 Mpixels/s tile-based 3d graphics full pipeline with embedded performance counting module, real-time bus tracer and protocol checker for consumer electronics
Ruei-Ting Gu,, Wei-Sheng Huang,, Chien-Chou Wang,, Wen-Chi Shiue,, Tsung-Yu Ho,, Chung-Hua Tsai,, Tzu-Ching Tien,, Da-Jing Zhang-Jian,, Sheng-Yu Chiu,, Ing-Jer Huang,, Yun-Nan Chang,, Shen-Year:
2008
Language:
english
DOI:
10.1109/vdat.2008.4542412
File:
PDF, 1.53 MB
english, 2008