[IEEE 2010 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Anaheim, FL, USA (2010.06.10-2010.06.12)] 2010 IEEE International High Level Design Validation and Test Workshop (HLDVT) - Retiming arithmetic datapaths using Timed Taylor Expansion Diagrams
Gomez-Prado, Daniel, Kim, Dusung, Ciesielski, Maciej, Boutillon, EmmanuelYear:
2010
Language:
english
DOI:
10.1109/hldvt.2010.5496664
File:
PDF, 943 KB
english, 2010