[IEEE Digest of Technical Papers. 2004 Symposium on VLSI...

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[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Integration of interconnect process highly manufacturable for 65nm CMOS platform technology (CMOS5)

Honda, K., Kanda, M., Ishizuka, R., Moriuchi, Y., Matsubara, Y., Habu, M., Yoshida, T., Matsuda, S., Kittaka, H., Miyajima, H., Hachiya, T., Kajita, A., Usui, T., Nagashima, N., Kanamura, R., Okamoto,
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Year:
2004
Language:
english
DOI:
10.1109/vlsit.2004.1345394
File:
PDF, 206 KB
english, 2004
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