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[IEEE Comput. Soc. Press EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - Geneva, Switzerland (16-20 Sept. 1996)] Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - Mapping statechart models onto an FPGA-based ASIP architecture
Buchenrieder, K., Pyttel, A., Veith, C.Year:
1996
Language:
english
DOI:
10.1109/eurdac.1996.558203
File:
PDF, 687 KB
english, 1996