Bit-serial multiplier based on Josephson latching logic

IEEE Transactions on Appiled Superconductivity 1993 / 3 Vol. 3; Iss. 1

Bit-serial multiplier based on Josephson latching logic

Moopenn, A., Arambula, E.R., Lewis, M.J., Chan, H.W.
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Volume:
3
Language:
english
Journal:
IEEE Transactions on Appiled Superconductivity
DOI:
10.1109/77.233983
Date:
March, 1993
File:
PDF, 729 KB
english, 1993
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