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[IEEE 2008 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2008.06.18-2008.06.20)] 2008 IEEE Symposium on VLSI Circuits - A one MB cache subsystem prototype with 2GHz embedded DRAMs in 45nm SOI CMOS
Klim, Peter, Barth, John, Reohr, William, Dick, David, Fredeman, Gregory, Koch, Gary, Hien Le,, Khargonekar, Aditya, Wilcox, Pamela, Golz, John, Kuang, JB, Mathews, Abraham, Luong, Trong, Hung Ngo,,Year:
2008
Language:
english
DOI:
10.1109/vlsic.2008.4586008
File:
PDF, 379 KB
english, 2008