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[IEEE 2006 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA (2006.02.6-2006.02.9)] 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers - A PVT-Tolerant Low-1/f Noise Dual-Loop Hybrid PLL in 0.18/spl mu/m
Hyung-Rok Lee,, Ook Kim,, Keewook Jung,, Shin, J., Deog-Kyoon Jeong,Year:
2006
Language:
english
DOI:
10.1109/isscc.2006.1696304
File:
PDF, 2.27 MB
english, 2006