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[IEEE Proceedings of IEEE International Electron Devices Meeting - San Francisco, CA, USA (1989.12.3-1989.12.6)] International Technical Digest on Electron Devices Meeting - Retrograde well and epitaxial thickness optimization for shallow- and deep-trench collar merged isolation and node trench SPT DRAM cell and CMOS logic technology
Voldman,, Marceau,, Baker,, Adler,, Geissler,, Slinkman,, Johnson,, Paggi,Year:
1992
Language:
english
DOI:
10.1109/iedm.1992.307482
File:
PDF, 336 KB
english, 1992