[IEEE 2008 Design, Automation and Test in Europe - Munich, Germany (2008.03.10-2008.03.14)] 2008 Design, Automation and Test in Europe - Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network
Zhang, Wanping, Zhu, Yi, Yu, Wenjian, Zhang, Ling, Shi, Rui, Peng, He, Zhu, Zhi, Chua-Eoan, Lew, Murgai, Rajeev, Shibuya, Toshiyuki, Ito, Nuriyoki, Cheng, Chung-KuanYear:
2008
Language:
english
DOI:
10.1109/date.2008.4484906
File:
PDF, 243 KB
english, 2008