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[IEEE 2007 IEEE Symposium on VLSI Technology - Kyoto, Japan (2007.06.12-2007.06.14)] 2007 IEEE Symposium on VLSI Technology - 1st quantitative failure-rate calculation for the actual large-scale SRAM using ultra-thin gate-dielectric with measured probability of the gate-current fluctuation and simulated circuit failure-rate
Sakoda, Tsunehisa, Tamura, Naoyoshi, Xiao, Shiqin, Minakata, Hiroshi, Morisaki, Yusuke, Nishigaya, Keita, Saiki, Takashi, Uetake, Toshiyuki, Iwasaki, Toshio, Ehara, Hideo, Matsuyama, Hideya, Shimizu,Year:
2007
Language:
english
DOI:
10.1109/vlsit.2007.4339713
File:
PDF, 304 KB
english, 2007