[IEEE 2009 IEEE International Solid-State Circuits...

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[IEEE 2009 IEEE International Solid-State Circuits Conference (ISSCC 2009) - San Francisco, CA (2009.02.8-2009.02.12)] 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - A 1.6V 3.3Gb/s GDDR3 DRAM with dual-mode phase- and delay-locked loop using power-noise management with unregulated power supply in 54nm CMOS

Hyun-Woo Lee,, Won-Joo Yun,, Young-Kyoung Choi,, Hyang-Hwa Choi,, Jong-Jin Lee,, Ki-Han Kim,, Shin-Deok Kang,, Ji-Yeon Yang,, Jae-Suck Kang,, Hyeng-Ouk Lee,, Dong-Uk Lee,, Sujeong Sim,, Yo
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Year:
2009
Language:
english
DOI:
10.1109/isscc.2009.4977347
File:
PDF, 26.30 MB
english, 2009
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