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[IEEE 2012 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2012.06.12-2012.06.14)] 2012 Symposium on VLSI Technology (VLSIT) - Demonstration of improved heteroepitaxy, scaled gate stack and reduced interface states enabling heterojunction tunnel FETs with high drive current and high on-off ratio
Mohata, D. K., Bijesh, R., Zhu, Y., Hudait, M. K., Southwick, R., Chbili, Z., Gundlach, D., Suehle, J., Fastenau, J. M., Loubychev, D., Liu, A. K., Mayer, T. S., Narayanan, V., Datta, S.Year:
2012
Language:
english
DOI:
10.1109/vlsit.2012.6242457
File:
PDF, 570 KB
english, 2012