On robust two-pattern testing of one-dimensional CMOS iterative logic arrays
GIZOPOULOS, DIMITRIS, PASCHALIS, ANTONIS, NIKOLOS, DIMITRIS, HALATSIS, CONSTANTINEVolume:
86
Language:
english
Journal:
International Journal of Electronics
DOI:
10.1080/002072199132969
Date:
August, 1999
File:
PDF, 190 KB
english, 1999