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[IEEE 2005 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'05) - Taipei, Taiwan (03-05 Aug. 2005)] 2005 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'05) - A Systematic Approach to Reducing Semiconductor Memory Test Time in Mass Production
Jen-Chieh Yeh,, Shyr-Fen Kuo,, Cheng-Wen Wu,, Chih-Tsun Huang,, Chao-Hsun Chen,Year:
2005
Language:
english
DOI:
10.1109/mtdt.2005.15
File:
PDF, 146 KB
english, 2005