A 1.7-ns ACCESS TIME SRAM USING VARIABLE BULK BIAS...

Journal of Circuits System and Computers 2008 / 10 Vol. 17; Iss. 5

A 1.7-ns ACCESS TIME SRAM USING VARIABLE BULK BIAS WORDLINE-CONTROLLED TRANSISTORS

WANG, CHUA-CHIN, SUNG, GANG-NENG, HUANG, CHI-CHUN, LEE, CHING-LI, CHEN, TIAN-HAU, LIN, WUN-JI, HU, RON
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Volume:
17
Language:
english
Journal:
Journal of Circuits, Systems and Computers
DOI:
10.1142/S0218126608004708
Date:
October, 2008
File:
PDF, 715 KB
english, 2008
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