[IEEE 2014 International Conference on Advances in Engineering and Technology Research (ICAETR) - Unnao, India (2014.8.1-2014.8.2)] 2014 International Conference on Advances in Engineering & Technology Research (ICAETR - 2014) - FPGA implementation of Addition/Subtraction module for double precision floating point numbers using Verilog
Rane, Sonali M., Wagh, Trupti, Malathi, P.Year:
2014
Language:
english
DOI:
10.1109/icaetr.2014.7012850
File:
PDF, 1.46 MB
english, 2014