Introduction to Logic Synthesis using Verilog HDL

Synthesis Lectures on Digital Circuits and Systems 2006 / 01 Vol. 1; Iss. 1

Introduction to Logic Synthesis using Verilog HDL

Reese, Robert B., Thornton, Mitchell A.
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Volume:
1
Language:
english
Journal:
Synthesis Lectures on Digital Circuits and Systems
DOI:
10.2200/s00060ed1v01y200610dcs006
Date:
January, 2006
File:
PDF, 7.82 MB
english, 2006
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