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Future Generation Computer Systems 2015 / 1

ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces

Ammendola, Roberto, Biagioni, Andrea, Frezza, Ottorino, Geurts, Werner, Goossens, Gert, Lo Cicero, Francesca, Lonardo, Alessandro, Paolucci, Pier Stanislao, Rossetti, Davide, Simula, Francesco, Tosora
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Language:
english
Journal:
Future Generation Computer Systems
DOI:
10.1016/j.future.2014.12.012
Date:
January, 2015
File:
PDF, 2.38 MB
english, 2015
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