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A simulation-based proposed high- k heterostructure AlGaAs/Si junctionless n-type tunnel FET
Rahi, Shiromani Balmukund, Ghosh, Bahniman, Asthana, PranavVolume:
35
Language:
english
Journal:
Journal of Semiconductors
DOI:
10.1088/1674-4926/35/11/114005
Date:
November, 2014
File:
PDF, 900 KB
english, 2014