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Wide operational margin capability of 1 kbit spin-transfer-torque memory array chip with 1-PMOS and 1-bottom-pin-magnetic-tunnel-junction type cell
Koike, Hiroki, Ohsawa, Takashi, Miura, Sadahiko, Honjo, Hiroaki, Ikeda, Shoji, Hanyu, Takahiro, Ohno, Hideo, Endoh, TetsuoVolume:
53
Language:
english
Journal:
Japanese Journal of Applied Physics
DOI:
10.7567/JJAP.53.04ED13
Date:
January, 2014
File:
PDF, 1.80 MB
english, 2014