[IEEE 2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC) - Chiba, Japan (2015.1.19-2015.1.22)] The 20th Asia and South Pacific Design Automation Conference - Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling
Seyong Ahn,, Minseok Kang,, Papaefthymiou, Marios C., Taewhan Kim,Year:
2015
Language:
english
DOI:
10.1109/aspdac.2015.7059053
File:
PDF, 877 KB
english, 2015