A Systolic Array Based GTD Processor With a Parallel...

IEEE Transactions on Circuits and Systems I: Regular Papers 2015 / 4 Vol. 62; Iss. 4

A Systolic Array Based GTD Processor With a Parallel Algorithm

Yang, Chia-Hsiang, Chou, Chun-Wei, Hsu, Chia-Shen, Chen, Chiao-En
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Volume:
62
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2015.2388831
Date:
April, 2015
File:
PDF, 2.32 MB
english, 2015
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