Modeling effects of interface traps on the gate C–V...

Solid-State Electronics 2010 Vol. 54; Iss. 6

Modeling effects of interface traps on the gate C–V characteristics of MOS devices on alternative high-mobility substrates

Md. Mahbub Satter, Anisul Haque
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Volume:
54
Year:
2010
Language:
english
Pages:
7
DOI:
10.1016/j.sse.2010.02.004
File:
PDF, 313 KB
english, 2010
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