Design and optimization of high voltage LDMOS transistors on 0.18 μm SOI CMOS technology
G. Toulon, I. Cortés, F. Morancho, E. Hugonnard-Bruyère, B. Villard, W.J. TorenVolume:
61
Year:
2011
Language:
english
Pages:
5
DOI:
10.1016/j.sse.2011.03.014
File:
PDF, 1.06 MB
english, 2011