![](/img/cover-not-exists.png)
A tamper resistant hardware accelerator for RSA cryptographic applications
G.P. Saggese, L. Romano, N. Mazzocca, A. MazzeoVolume:
50
Year:
2004
Language:
english
Pages:
17
DOI:
10.1016/j.sysarc.2004.04.002
File:
PDF, 896 KB
english, 2004