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FPGA/DSP-based implementation of a high-performance multi-channel counter
F. Baronti, A. Lazzeri, R. Roncella, R. SalettiVolume:
55
Year:
2009
Language:
english
Pages:
7
DOI:
10.1016/j.sysarc.2009.03.002
File:
PDF, 628 KB
english, 2009