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Low-power pipelined phase accumulator with sequential clock gating for DDFSs
Kim, Y.S., Lee, J., Baek, K.-H., Hong, Y., Kim, J.E.Volume:
49
Language:
english
Journal:
Electronics Letters
DOI:
10.1049/el.2013.2588
Date:
November, 2013
File:
PDF, 385 KB
english, 2013