Minimization of Drain-to-Gate Interaction in a SiC JFET...

Minimization of Drain-to-Gate Interaction in a SiC JFET Inverter Using an External Gate-Source Capacitor

Berry, Olivier, Hamieh, Youness, Raël, Stéphane, Meibody-Tabar, Farid, Vieillard, Sébastien, Bergogne, Dominique, Morel, Hervé
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Volume:
645-648
Language:
english
Journal:
Materials Science Forum
DOI:
10.4028/www.scientific.net/MSF.645-648.957
Date:
April, 2010
File:
PDF, 878 KB
english, 2010
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