Sign extension bit minimisation algorithm for multi-bit...

Sign extension bit minimisation algorithm for multi-bit coded multiplier structures for DSP applications

Poornaiah, D.V.
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
32
Year:
1996
Language:
english
Journal:
Electronics Letters
DOI:
10.1049/el:19961007
File:
PDF, 325 KB
english, 1996
Conversion to is in progress
Conversion to is failed