Sign extension bit minimisation algorithm for designing...

Electronics Letters 1998 Vol. 34; Iss. 2

Sign extension bit minimisation algorithm for designing VLSI inner-product-processor cells for DSP applications

Poornaiah, D.V.
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Volume:
34
Year:
1998
Language:
english
Journal:
Electronics Letters
DOI:
10.1049/el:19980196
File:
PDF, 270 KB
english, 1998
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