Modeling of ΔI BL...

Semiconductor Science and Technology 2014 / 12 Vol. 29; Iss. 12

Modeling of ΔI BL due to random telegraph noise with considering bit-line interference in NAND flash memory

Joe, Sung-Min, Bae, Jong-Ho, Park, Chan Hyeong, Lee, Jong-Ho
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Volume:
29
Language:
english
Journal:
Semiconductor Science and Technology
DOI:
10.1088/0268-1242/29/12/125013
Date:
December, 2014
File:
PDF, 429 KB
english, 2014
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