A 1-16-Gb/s All-Digital Clock and Data Recovery With a Wideband, High-Linearity Phase Interpolator
Wu, Guoying, Huang, Deping, Li, Jingxiao, Gui, Ping, Liu, Tianwei, Guo, Shita, Wang, Rui, Fan, Yanli, Chakraborty, Sudipto, Morgan, MarkYear:
2015
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2015.2418277
File:
PDF, 2.89 MB
english, 2015