A Novel Area-Efficient VLSI Architecture for Recursion...

IEEE Transactions on Circuits and Systems II: Express Briefs 2015 / 6 Vol. 62; Iss. 6

A Novel Area-Efficient VLSI Architecture for Recursion Computation in LTE Turbo Decoders

Ardakani, Arash, Shabany, Mahdi
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Volume:
62
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/tcsii.2015.2407232
Date:
June, 2015
File:
PDF, 642 KB
english, 2015
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