Structure and Process Parameter Optimization for Sub-10nm...

MRS Proceedings 2006 / 1 Vol. 913

Structure and Process Parameter Optimization for Sub-10nm Gate Length Fully Depleted N-Type SOI MOSFETs by TCAD Modeling and Simulation

Jin, Yawei, Ma, Lei, Zeng, Chang, Dandu, Krishnanshu, Barlage, Doug William
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Volume:
913
Language:
english
Journal:
MRS Proceedings
DOI:
10.1557/PROC-0913-D01-10
Date:
January, 2006
File:
PDF, 262 KB
english, 2006
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