Wafer Level Accelerated test for ionic contamination...

Microelectronics Reliability 2001 Vol. 41; Iss. 9-10

Wafer Level Accelerated test for ionic contamination control on VDMOS transistors in Bipolar/CMOS/DMOS

Y. Rey-Tauriac, M. Taurin, O. Bonnaud
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Volume:
41
Year:
2001
Pages:
4
DOI:
10.1016/s0026-2714(01)00209-8
File:
PDF, 356 KB
2001
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