ECS Transactions [ECS China Semiconductor Technology International Conference 2010 (CSTIC 2010) - Shanghai, China (March 18 - March 19, 2010)] - Litho/Design Co-Optimization and Area Scaling for the 22-nm Logic Node
Blatchford, James W., Prins, Steven L., Jessen, Scott W., Dam, Thuc, Baik, KiHo, Pang, Linyong, Gleason, BobYear:
2010
Language:
english
DOI:
10.1149/1.3360658
File:
PDF, 2.38 MB
english, 2010