[IEEE 2014 Conference on Design of Circuits and Integrated Systems (DCIS) - Madrid, Spain (2014.11.26-2014.11.28)] Design of Circuits and Integrated Systems - Assessing SET sensitivity of a PLL
Portela-Garcia, M., Lopez-Ongil, C., Garcia-Valderas, M., Entrena, L., Thys, G., Redant, S.Year:
2014
Language:
english
DOI:
10.1109/DCIS.2014.7035582
File:
PDF, 368 KB
english, 2014