Hierarchical Test Integration Methodology for 3-D ICs

Hierarchical Test Integration Methodology for 3-D ICs

Chou, Che-Wei, Li, Jin-Fu, Yu, Yun-Chao, Lo, Chih-Yen, Kwai, Ding-Ming, Chou, Yung-Fa
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Volume:
32
Language:
english
Journal:
IEEE Design & Test
DOI:
10.1109/MDAT.2015.2427257
Date:
August, 2015
File:
PDF, 665 KB
english, 2015
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