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[IEEE 2015 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2015.4.27-2015.4.29)] VLSI Design, Automation and Test(VLSI-DAT) - All digitally controlled linear voltage regulator with PMOS strength self-calibration for ripple reduction
Kuo, Yi-Ping, Huang, Po-Tsang, Wu, Chung-Shiang, Liang, Yu-Jie, Chuang, Ching-Te, Chu, Yuan-Hua, Hwang, WeiYear:
2015
Language:
english
DOI:
10.1109/vlsi-dat.2015.7114514
File:
PDF, 821 KB
english, 2015