A High-Bit-Rate (64/67) DC-Balance Line Code Scheme Based...

A High-Bit-Rate (64/67) DC-Balance Line Code Scheme Based on Guided Scrambling

Yang, Xue, Xiong, Jian Ping, Ma, Cheng, Jia, Hui Bo
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Volume:
229-231
Language:
english
Journal:
Applied Mechanics and Materials
DOI:
10.4028/www.scientific.net/amm.229-231.1572
Date:
November, 2012
File:
PDF, 491 KB
english, 2012
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