Delta–sigma DAC with jitter-shaper-reducing jitter noise
Watanabe, Yuki, Saikatsu, Satoshi, Yoshino, Michitaka, Yasuda, AkiraVolume:
85
Language:
english
Journal:
Analog Integrated Circuits and Signal Processing
DOI:
10.1007/s10470-015-0600-5
Date:
November, 2015
File:
PDF, 2.09 MB
english, 2015