Probabilistic analysis of dynamic and temporal fault trees using accurate stochastic logic gates
Cheshmikhani, Elham, Zarandi, Hamid R.Language:
english
Journal:
Microelectronics Reliability
DOI:
10.1016/j.microrel.2015.06.047
Date:
July, 2015
File:
PDF, 4.36 MB
english, 2015