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A formal method for hardware IP design and integration under I/O and timing constraints
Coussy, Philippe, Casseau, Emmanuel, Bomel, Pierre, Baganne, Adel, Martin, EricVolume:
5
Language:
english
Journal:
ACM Transactions on Embedded Computing Systems
DOI:
10.1145/1132357.1132359
Date:
February, 2006
File:
PDF, 2.08 MB
english, 2006