VLSI Architecture Design of FM0/Manchester Codec with 100%...

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IEEE Sensors Journal 2015

VLSI Architecture Design of FM0/Manchester Codec with 100% Hardware Utilization Rate for DSRC-Based Sensor Nodes in ITS Applications

Lee, Yu-Hsuan, Pan, Cheng-Wei, Tsai, Fang-Hsu
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Year:
2015
Language:
english
Journal:
IEEE Sensors Journal
DOI:
10.1109/JSEN.2015.2464712
File:
PDF, 757 KB
english, 2015
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