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IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2014

Optimizing Spatial Mapping of Nested Loop for Coarse-Grained Reconfigurable Architectures

Liu, Dajiang, Yin, Shouyi, Peng, Yu, Liu, Leibo, Wei, Shaojun
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Year:
2014
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2014.2371854
File:
PDF, 4.82 MB
english, 2014
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