Optimised 0.25 [micro sign]m high performance retrograde...

Optimised 0.25 [micro sign]m high performance retrograde well pMOS device for low-power applications

Swe, Toe-Naing, Yeo, Kiat-Seng
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Volume:
34
Year:
1998
Language:
english
Journal:
Electronics Letters
DOI:
10.1049/el:19981178
File:
PDF, 298 KB
english, 1998
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