![](/img/cover-not-exists.png)
[ACM Press Proceeding of the thirteenth international symposium - Bangalore, India (2008.08.11-2008.08.13)] Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08 - Clock gating for power optimization in ASIC design cycle theory & practice
S, Jairam, Rao, Madhusudan, Srinivas, Jithendra, Vishwanath, Parimala, H, Udayakumar, Rao, JagdishYear:
2008
Language:
english
DOI:
10.1145/1393921.1394003
File:
PDF, 85 KB
english, 2008