Cell based design methodology for BDD SFQ logic circuits: A...

IEEE Transactions on Appiled Superconductivity 2003 / 06 Vol. 13; Iss. 2

Cell based design methodology for BDD SFQ logic circuits: A high speed test and feasibility for large scale circuit applications

Yoshikawa, N., Yoda, K., Hoshina, H., Kawasaki, K., Fujiwara, K., Matsuzaki, F., Nakajima, N.
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Volume:
13
Language:
english
Journal:
IEEE Transactions on Appiled Superconductivity
DOI:
10.1109/TASC.2003.813923
Date:
June, 2003
File:
PDF, 963 KB
english, 2003
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