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[ACM Press the 1998 international symposium - Monterey, California, United States (1998.08.10-1998.08.12)] Proceedings of the 1998 international symposium on Low power electronics and design - ISLPED '98 - A power optimization method considering glitch reduction by gate sizing
Hashimoto, Masanori, Onodera, Hidetoshi, Tamaru, KeikichiYear:
1998
Language:
english
DOI:
10.1145/280756.280907
File:
PDF, 203 KB
english, 1998